Chinese-owned T-Head Semiconductor has successfully ported Android 10 to its very own RISC-V port silicon. This shows an increased momentum for RISC-V, an open-source ISA (Instruction Set Architecture).
T-Head, which is known as ‘Pintouge’, has demonstrated the open-source base of AOSP (Android Open Source Project). The company got the operating system running on a prototype board powered by one of T-Head’s own chips. It’s a bit of an odd core configuration, with three 64-bit RISC-V XuanTie C910 cores. Each core is clocked at just 1.2GHz, and one of the cores supports 128-bit vector instructions. We are not sure what GPU the chip uses.
Related post: Tech Snippet #11: So, What Exactly is RISV V?
What the company has running looks like a relatively normal Android experience. It has a full GUI complete with touchscreen interactions. Right now it’s just a proof of concept, but if I were you, I would expect to see RISC-V Android phones in the near future.
Android running on RISC-V (XuanTie 910) has come, and all relevant source codes have been opened. I believe that RISC-V can create more impossible and greater value to the world. @risc_v Below is the link:https://t.co/H8UddmEmPx pic.twitter.com/3yZHdg56fj— Yunhai Shang (@YunhaiShang) January 21, 2021
RISC-V is a royalty free, totally open-source ISA. RISC-V was introduced in the early 2010s as an academic project. It was originally intended to help teach university students about instruction sets. Recently, however, commercial interest in the technology has grown. Most of the growth and interest has come from China and India. In those countries, RISC-V helps to reduce their dependence on foreign technology. This is because anyone can implement the RISC-V specifications in its CPU cores. They can also add onto RISC-V’s instruction set. All at no cost and entirely without any permission.
Businesses that are located in countries that may fall victim to US sanctions see RISC-V as an insurance policy, and in some cases, an escape route. Although RISC-V is still in its early stages and is by no means ready for prime-time, this will change. Quickly. Remember, it’s a fully open-source design. Anyone can add to it, and add to it they will.
Related post: Ladies and Gentlemen – Meet The ESP32-C3
Alan Priestly, a Gartner VP analyst, described the Android 10 port as an ‘interesting development.’ He thinks it could be useful for adding GUIs to RISC-V-powered systems.
Many embedded/industrial system leverage Android to provide graphical user interfaces and Android apps are written in Java (as is a lot of Android itself) so the apps are processor ISA agnostic and would be easily ported to RISC-V based processors. In the near term, use of RISC-V is a good option for many vendors developing low-cost embedded chips as there are no licensing or royalty fees associated with RISC-V IP (unless they want to use the RISC-V logo) and having Android support provides a relatively lightweight OS with good app development support.Alan Priestly
It will, however, take some time before RISC-V is able to make a significant impact. This is because graphically intensive apps, such as most games, rely on software that is written natively in C and C++. These various pieces of software specifically target the ARM architecture. So, it’s going to require some upfront investment from vendors to be able to compete with incumbent silicon in terms of power-efficiency and performance.
I’m not sure I have seen any vendor going down this route, but it’s always a possibility if Nvidia closes its acquisition of Arm and a vendor has concerns working with a major competitor.Alan Priestly
RISC-V has seen significant momentum in adoption, particularly in industrial IoT. Replacing Arm as a ‘big core’ in a smartphone is a little way off but this porting of Android is a clear indication of where RISC-V is heading.
RISC-V already has a role in smartphones today in terms microcontrollers. Long term it’s a clear challenge to Arm, particularly in industrial IoT. Should Arm end up part of Nvidia, this will undoubtedly represent another catalyst for growth.Geoff Blaber – VP of Research at CCS Insight
You can find the source code for T-Head’s RISC-V port of AOSP 10 and instructions on how to run it in an emulated environment on its GitHub page.